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 NTMD6N02R2 Power MOSFET 6.0 Amps, 20 Volts
N-Channel Enhancement Mode Dual SO-8 Package
Features
* * * * * * *
Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature Dual SO-8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified SO-8 Mounting Information Provided
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VDSS 20 V RDS(ON) TYP 35 m @ VGS = 4.5 V ID MAX 6.0 A
N-Channel D
Applications
* DC-DC Converters * Low Voltage Motor Control * Power Management in Portable and Battery-Powered Products, for
example, Computers, Printers, Cellular and Cordless Telephones and PCMCIA Cards
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Drain-to-Gate Voltage (RGS = 1.0 MW) Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Ambient (Note 1) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 70C Pulsed Drain Current (Note 4) Thermal Resistance - Junction-to-Ambient (Note 2) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 70C Pulsed Drain Current (Note 4) Thermal Resistance - Junction-to-Ambient (Note 3) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 70C Pulsed Drain Current (Note 4) Symbol VDSS VDGR VGS RJA PD ID ID IDM RJA PD ID ID IDM RJA PD ID ID IDM Value 20 20 "12 62.5 2.0 6.5 5.5 50 102 1.22 5.07 4.07 40 172 0.73 3.92 3.14 30 Unit V V V C/W W A A A C/W W A A A C/W W A A A 8 G
S
1 SO-8 CASE 751 STYLE 11
MARKING DIAGRAM & PIN ASSIGNMENT
Source 1 Gate 1 Source 2 Gate 2 1 2 3 4 (Top View) E6N02 L Y WW = Device Code = Assembly Location = Year = Work Week E6N02 LYWW 8 7 6 5 Drain 1 Drain 1 Drain 2 Drain 2
1. Mounted onto a 2 square FR-4 Board (1 sq. 2 oz. Cu 0.06 thick single sided), t < 10 seconds. 2. Mounted onto a 2 square FR-4 Board (1 sq. 2 oz. Cu 0.06 thick single sided), t = steady state. 3. Minimum FR-4 or G-10 PCB, t = steady state. 4. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.
ORDERING INFORMATION
Device NTMD6N02R2 Package SO-8 Shipping 2500/Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2004
1
April, 2004 - Rev. 2
Publication Order Number: NTMD6N02R2/D
NTMD6N02R2
MAXIMUM RATINGS (TJ = 25C unless otherwise noted) (continued)
Rating Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting T J = 25C (VDD = 20 Vdc, VGS = 5.0 Vdc, Peak IL = 6.0 Apk, L = 20 mH, RG = 25 ) Maximum Lead Temperature for Soldering Purposes for 10 seconds Symbol TJ, Tstg EAS TL Value -55 to +150 360 260 Unit C mJ C
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) (Note 5)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 25C) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = +12 Vdc, VDS = 0 Vdc) Gate-Body Leakage Current (VGS = -12 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = -250 mAdc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = 4.5 Vdc, ID = 6.0 Adc) (VGS = 4.5 Vdc, ID = 4.0 Adc) (VGS = 2.7 Vdc, ID = 2.0 Adc) (VGS = 2.5 Vdc, ID = 3.0 Adc) Forward Transconductance (VDS = 12 Vdc, ID = 3.0 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 6 and 7) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge (VDS = 16 Vdc, VGS = 4.5 Vdc, ID = 6.0 Adc) 6 0 Ad ) (VDD = 16 Vdc, ID = 4.0 Adc, VGS = 4.5 Vdc, 4 5 Vdc RG = 6.0 ) (VDD = 16 Vdc, ID = 6.0 Adc, VGS = 4.5 Vdc, 4 5 Vdc RG = 6.0 ) td(on) tr td(off) tf td(on) tr td(off) tf Qtot Qgs Qgd - - - - - - - - - - - 12 50 45 80 11 35 45 60 12 1.5 4.0 20 90 75 130 18 65 75 110 20 - - nC ns ns (VDS = 16 Vdc, VGS = 0 Vdc, Vd Vd f = 1.0 MHz) Ciss Coss Crss - - - 785 260 75 1100 450 180 pF VGS(th) 0.6 - RDS(on) - - - - gFS - 0.028 0.028 0.033 0.035 10 0.035 0.043 0.048 0.049 - Mhos 0.9 -3.0 1.2 - Vdc mV/C V(BR)DSS 20 - IDSS - - IGSS IGSS - - - - - - 1.0 10 100 -100 nAdc nAdc - 19.2 - - Vdc mV/C mAdc Symbol Min Typ Max Unit
5. Handling precautions to protect against electrostatic discharge is mandatory 6. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%. 7. Switching characteristics are independent of operating junction temperature.
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2
NTMD6N02R2
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) (continued) (Note 8)
Characteristic BODY-DRAIN DIODE RATINGS (Note 9) Diode Forward On-Voltage (IS = 4.0 Adc, VGS = 0 Vdc) (IS = 6.0 Adc, VGS = 0 Vdc) (IS = 6.0 Adc, VGS = 0 Vdc, TJ = 125C) (IS = 6.0 Adc, VGS = 0 Vdc, 6 0 Ad Vd dIS/dt = 100 A/ms) Reverse Recovery Stored Charge 8. Handling precautions to protect against electrostatic discharge is mandatory. 9. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%. VSD - - - - - - - 0.83 0.88 0.75 30 15 15 0.02 1.1 1.2 - - - - - mC Vdc Symbol Min Typ Max Unit
Reverse Recovery Time
trr ta tb QRR
ns
12 I D, DRAIN CURRENT (AMPS) 10 8
10 V
2.5 V 4.5 V 3.2 V
2.0 V ID, DRAIN CURRENT (AMPS) TJ = 25C 1.8 V
12 VDS 10 V 10 8 6 4 2 0 100C 25C
6 4 2 0 VGS = 1.5 V
TJ = -55C
0
0.25 0.5 0.75 1 1.25 1.5 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1.75
0.5
1 1.5 2 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
2.5
R DS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS)
0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0 2 4 6 8 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 10 ID = 6.0 A TJ = 25C
R DS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.05 TJ = 25C 0.04 VGS = 2.5 V 0.03
4.5 V
0.02
0.01
1
3
9 5 7 ID, DRAIN CURRENT (AMPS)
11
13
Figure 3. On-Resistance versus Gate-To-Source Voltage
Figure 4. On-Resistance versus Drain Current and Gate Voltage
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3
NTMD6N02R2
RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.6 ID = 6.0 A VGS = 4.5 V 1000 VGS = 0 V TJ = 125C 100C 10
1.2
I DSS , LEAKAGE (nA)
1.4
100
1
1
25C
0.8 0.6 -50
0.1 0.01 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150 4 8 12 16 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 20
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-To-Source Leakage Current versus Voltage
VDS = 0 V Ciss
VGS = 0 V
TJ = 25C
QT 4 VDS 3 Q1 Q2 ID = 6 A VDS = 16 V VGS = 4.5 V TJ = 25C VGS 12 16
C, CAPACITANCE (pF)
2000
1500
Crss
1000
Ciss Coss
2
8
500 Crss 0 10 5 0 VGS VDS 5 10 15
1 0 0 4 8 12 16 Qg, TOTAL GATE CHARGE (nC)
4 0
20
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge
1000 VDS = 16 V ID = 6.0 A VGS = 4.5 V t, TIME (ns)
100 tf tr td(off)
10 1
td(on) 10 RG, GATE RESISTANCE (OHMS) 100
Figure 9. Resistive Switching Time Variation versus Gate Resistance
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4
V DS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
2500
VGS , GATE-TO-SOURCE VOLTAGE (VOLTS)
5
20
NTMD6N02R2
DRAIN-TO-SOURCE DIODE CHARACTERISTICS
5 I S, SOURCE CURRENT (AMPS) VGS = 0 V TJ = 25C 100 I D , DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 10 1 ms 10 ms 1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 10
4
100 s
3
2
1 0
0.1 0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
dc 100
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
Figure 11. Maximum Rated Forward Biased Safe Operating Area
di/dt IS trr ta tb TIME tp IS 0.25 IS
Figure 12. Diode Reverse Recovery Waveform
TYPICAL ELECTRICAL CHARACTERISTICS
1 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 t2 DUTY CYCLE, D = t1/t2 1.0E-03 1.0E-02 1.0E-01 t, TIME (s) 1.0E+00 t1 P(pk) RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t) 1.0E+01 1.0E+02 1.0E+03
SINGLE PULSE 0.001 1.0E-05 1.0E-04
Figure 13. Thermal Response
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5
NTMD6N02R2
PACKAGE DIMENSIONS
SO-8 CASE 751-07 ISSUE AB
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060 7.0 0.275 4.0 0.155
STYLE 11: PIN 1. 2. 3. 4. 5. 6. 7. 8.
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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6
NTMD6N02R2/D


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